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Atmel Introduces Innovative AVR32 Application Processor

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Written by Subhasis Chatterjee   
Thursday, 07 June 2007

Atmel® Corporation the renowned organization in designing and manufacturing of microcontrollers and advanced logic announced here today the AT32AP7001, a member of the AVR®32 AP7 family of Application Processors optimized for cost constrained, Linux®-based embedded designs. It has been stated in this regard, that the new appliance is packaged in a 30 x 30mm VQFP for easy integration into a four-layer PCB design. The paradigm of applications for the AT32AP7001, it is to be noted, take account of printers, fax machines, surveillance cameras, audio processing and industrial control equipment. The new device is learnt to have been built for the utility of the well-liked Linux operating system in an embedded setting.

 

Atmel, founded in 1984, is a renowned leader in the design and manufacture of microcontrollers, advanced logic, mixed-signal, nonvolatile memory and radio frequency (RF) components. The company through influencing one of the industry's broadest intellectual property (IP) technology portfolios, has been able to provide the electronics industry with complete system solutions. It is recorded as one of the minority elite new companies who are capable of incorporating dense nonvolatile memory, logic and analog functions on a single chip. The Atmel chips are manufactured through the usage of the most advanced wafer processes that includes BiCMOS, CMOS and Silicon Germanium (SiGe) technologies. It is also found to be concentrating on consumer, industrial, security, communications, computing and automotive markets.

The AT32AP7001, as has come to the knowledge, is built around Atmel's high throughput AVR32 AP7 Application Processor core and is perceived to offer 210 Dhrystone v2.1 MIPS when clocked at 150 MHz and powered at 1.8V (1.4 DMIPS / MHz), with an active power consumption of 75 mA (500 uA/MHz). It has also been found, the nucleus or central part has built-in DSP, SIMD instruction set, branch prediction and MMU. The contrivance also offers Dynamic Frequency Scaling (DFS), allowing on-the-fly adjustments of the power consumption in the four on-chip clock domains (CPU, High Speed Bus, 2 independent peripheral buses). In addition, the AT32AP7001 memory subsystem is consisted of a 32 KB on-chip high speed SRAM, 16+16 KB instruction and data caches, a memory management unit, DMA for high speed peripherals, and a peripheral DMA controller for peripherals that operate on a relatively low speed. The on-chip bus matrix contains 4 independent system buses, allowing up to 1.2 GB/s throughput between CPU and peripheral memories.

 
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